Linux Boot Process in RISC V SiFive boards using BBL1. RISC V Boards are having 4 (Four) Modes.
User mode -- User space programs runs
Supervisor mode -- Kernel runs here
Hypervisor mode -- Unspecified
Machine mode -- Machine instructions
SBI (Supervisory Binary Interface) is interaction between Machine Mode & Supervisor Mode
it provide set of api for Supervisor to interact with Machine mode , like set_timer, system_shutdown, system_reset etc.
2. In ARM CPU No.s & same is represented in RISC V as Hart Ids.
Boot CPU, or Hartid 0 is given to BBL for Initial boot process,
other HartIds are keep spining still HartId reaches to kernel init process.
mhartidCSR is read, so Linux can be passed a unique per-hart identifier. 7. Early Boot in Linux: 8. Standard Linux Boot Process: 9.Setup_Arch:On RISC-V systems,
setup_archproceeds to perform following operations: